Computer systems typically comprise a combination of computer programs and hardware, such as semiconductors, transistors, chips, and circuit boards. The hardware within a computer system is typically organized into components, such as processors, storage devices, and I/O (Input/Output) devices. These components typically communicate with each other via another component called a bus.
Buses can be parallel buses, which carry data words or multiple bits in parallel on multiple wires, or serial buses, which carry data in bit-serial form. A bus can be point-to-point, meaning that the bus connects only two components, or multi-drop, meaning that more than two components are connected to the bus. In a multi-drop bus, typically the bus has both data and address wires, and components connected to the bus listen for their unique destination address on the address wires, in order to discern whether data on the data wires is intended for them.
One example of a computer bus is called PCI EXPRESS (PERIPHERAL COMPONENT INTERCONNECT EXPRESS), which uses a network of point-to-point serial links. A pair of point-to-point PCI serial links makes up a lane. A hub routes the lanes and acts as a crossbar switch. This dynamic point-to-point behavior allows more than one pair of devices to communicate with each other at the same time. This format also allows channel grouping, where multiple lanes are bonded to a single device pair in order to provide higher bandwidth.
PCI EXPRESS devices communicate via a logical connection called an interconnect or link. A link is a point-to-point communication channel between two PCI EXPRESS ports, allowing both to send/receive ordinary PCI-requests (e.g., configuration read/writes, I/O read/writes, and memory read/writes) and interrupts. At the physical level, a link comprises one or more lanes.
A lane comprises a transmit and a receive pair of differential lines. Each lane comprises four wires, meaning that, conceptually, each lane is a full-duplex byte stream, transporting packets containing the data in eight-bit byte format, between the two endpoints of a link, in both directions simultaneously. PCI EXPRESS transmissions send control messages, including interrupts, over the same links used for data.
One way of accessing memory via an I/O bus is via a technique called memory-mapped I/O (MMIO), in which a processor maps addresses in an I/O device into the processor's address space in memory. Areas of the processor's addressable space in memory are reserved for I/O to/from I/O devices. This reservation may be either temporary or permanent. Each I/O device monitors the bus and responds to any processor's read/write from/to the device-assigned address space in memory. Thus, if the processor issues a read instruction to the device-assigned address space in memory, the I/O device receives the instruction from the bus and transmits the data (onto the bus) that is located at the corresponding address within the I/O device. Similarly, if the processor issues a write instruction to the device-assigned address space in memory, the I/O device receives the data from the bus and writes it to the corresponding address within the I/O device. In some MMIO schemes, the processor instructions that read/write from/to the device-assigned address space in memory are the same instructions that read/write from/to memory in address spaces that are not reserved for I/O devices. In other MMIO schemes, the processor instructions that read/write from/to the device-assigned address space in memory are different instructions from those that read/write from/to memory in address spaces that are not reserved for I/O devices.